Murari Kejariwal

Biography

Education

• University of Delhi, Delhi, India—B.S. (EE)
• University of Calgary, Calgary, Canada—M.S. (EE)
• University of Houston, Houston, Texas—Ph.D. (EE)

Industrial Experience

Expertise in design of Low power, low noise CMOS and bipolar analog circuits. As an individual contributor, designed and successfully taped out many different CMOS ICs in 600nm to 130nm technologies from different fab houses. Also worked with 0.18u process (BCD)with high voltage (32V) transistors. The ICs worked on included MEM sensor interface circuits, high precision seismic products line including low noise PGAs, switched cap amplifier,  charge pumps, LDOs and data converters, (ADC and DAC).

• 2014 Dec – Oct 2015 , HCL America Inc, CA – Senior IC Architect, as a contractor with Qualcomm  worked on the ASIC for the display drivers using 55nm, triple gate including high voltage technology. Involved with technology selection; design, verification of drivers, amplifiers and band-gap circuits; and supervised layouts.
• 2013 July – Nov 2014 , Consultant, MA – Feasibility study of a non-invasive medical device system involving charge pump, LDO, current source, amplifiers, signal processing circuits, LCD display etc.
• 2011 Dec – May 2013, Qualtre inc, Marlborough, MA – Senior Analog/Mixed Signal Design Engineer: A start-up company developing ASICs for their MEMS based gyroscope and accelerometer. Worked on the design of the ASIC.
• 1998 – 2011 Dec , Cirrus Logic, Inc., Austin, TX, Energy, Exploration, and Lighting (EXL) Division, Worked on high precision ICs in seismic product line. Also worked on power-meter ICs.

Staff Engineer (2002 – 2011),. Senior Design Engineer (1998 –2002)

• Designed ASICs as well off the selves parts .
• Extensively used Hspice, Eldo, Spectre, SpectreRF ; MATLAB and Verilog AMS and ADMS mixed mode simulation tools.
• Have worked in 0.6u to 0.13u technologies from different foundries. Also worked with 0.18u process (BCD) with high voltage (32V) transistors.

Academic Experience

• 2002-2003: Adjunct Associate Professor, University of Texas at Austin, TX, Taught undergraduate and graduate courses in CMOS Analog Design. Also taught CMOS Circuit Design courses to practicing engineers at Cirrus Logic, Austin, TX
• 1984-1997: Associate Professor (1990 – 1997), Assistant Professor (1984 – 1990) Department of Electrical Engineering, Montana State University, Bozeman, MT. Tenured Associate Professor – Taught graduate and undergraduate lecture as well laboratory courses. Heavily involved with senior design projects. Supervised many masters theses and projects. Also conducted research in biomedical instrumentation area. Worked on application of impedance tomography for breast cancer detection, SIDS monitor design, non-invasive nerve locator instrumentations. Actively wrote research grants.