- Professor (Career Track)
Biography
Shih-Lien (Linus) Lu is a Professor (Career Track) at WSU Everett. He is on leave without pay from PieceMakers Technology in Taiwan, where he is the Chief Solutions Officer. From 2021 to 2023, he was the sole faculty at Warner Pacific University, teaching the entire cybersecurity program. He was a Director at Taiwan Semiconductor Manufacturing Company (TSMC) Research and Development from 2016 to 2021. From 1999 to 2016, he was with Intel Corporation, Hillsboro, Oregon, where he was a research scientist, a research group manager, and later the Director of Memory Architecture Lab in Intel Labs. He served on the faculty of the ECE Department at Oregon State University as an Assistant Professor from 1991 to 1995 and as a tenured Associate Professor until 2001 (on leave the last two years). From 1984 to 1991, he worked on the MOSIS project at USC/ISI, which provides US research and education community VLSI fabrication services. He has published more than 100 papers and authored or co-authored more than 200 US patents. His research interests include computer architecture, memory system/architecture/circuits/technology, and hardware security. An IEEE Fellow, Shih-Lien received his B.S. in Electrical Engineering and Computer Science from UC Berkeley and M.S. and Ph.D. both in Computer Science and Engineering from UCLA.
Website
Education
- Ph.D.: Computer Science and Engineering, UCLA
Professional Experience
- Visiting Professor, Warner Pacific University
- Chief Solutions Officer, Piecemakers Technology
- Director, TSMC
- Director, Memory Architecture Lab, Intel Labs
- Associate Professor, Oregon State University
- Design System Manager, USC/ISI
Research Interests
- Hardware security
- Cybersecurity
- Memory technology, circuits, architecture
Professional Recognition
- Fellow, IEEE