EE 334: Digital System Architecture

Catalog Information

Course Number:

334

Credits:

Offered:

Spring

Pre-Requisites

Design of combination and sequential digital circuits. Knowledge of assembly language programming, memory addressing, I/O port addressing. Knowledge of VHDL.

Class Information

Objectives:

To provide a sound background on computer architecture. The main focus is processor design and evaluation with case studies. A number of architectural alternatives are described and evaluated using quantitative approaches.

Structure:

Three one-hour lectures. Typically, there will be several design projects, weekly quizzes, one mid-term exam and a final exam.

Topics:

Computer Abstractions and Technology (2)
Instruction Set Architecture (8)
Computer Arithmetic (4)
Performance Issues (3)
Processor's Datapath (4)
Pipelining (8)
Memory Hierarchy (8)

Lab Projects:

Design of parallel adder/subtractor.
VHDL implementation of various D flip-flops.
Design and implement washing machine controller.
Design and implement data path unit for Simple Risc Machine.
Develop specification for two bus SRC data path.
Design control sequences for data path unit.
Design and implement ALU.
Design and implement general registers and integrate ALU.
Design and implement microcoded control unit for SRC.
Design and implement memory unit for SRC and integrate with data path.
Design and implement exception processing for SRC.

Requirements

Textbooks/References:

D. A. Patterson and J. L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Third Edition. Morgan Kaufmann Publishers, 2005.

Professor/Coordinator:

Primary: Jose G. Delgado-Frias Secondary: Clint Cole

ABET Program Outcomes (click to expand)

The School of Electrical Engineering and Computer Science

EE 334: Digital System Architecture

ABET Program Outcome K:

ABET Program Outcome E:

ABET Program Outcome C:

ABET Program Outcome B:

ABET Program Outcome A: